Quad 2-line to 1-line Data Selectors/multiplexers. This X24C02 device has been acquired by IC Microsystems Sdn Bhd from Xicor, Inc. The X24C02 is. The LSTTL / MSI SN54 / 74LS is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select. S, 1 •, 16, Vcc. 1I0, 2, 15, E. 1I1, 3, 14, 4I0. 1Y, 4, 13, 4I1. 2I0, 5, 12, 4Y. 2I1, 6, 11, 3I0. 2Y, 7, 10, 3I1. GND, 8, 9, 3Y. Pin, Symbol, Description. 1, S, common data.

Author: | Tygosida Voodoom |

Country: | Botswana |

Language: | English (Spanish) |

Genre: | Science |

Published (Last): | 13 May 2012 |

Pages: | 394 |

PDF File Size: | 10.70 Mb |

ePub File Size: | 7.75 Mb |

ISBN: | 781-9-13451-389-1 |

Downloads: | 7237 |

Price: | Free* [*Free Regsitration Required] |

Uploader: | Vuzilkree |

The stitching and the logic diagram of this circuit are given on figure Let us examine simplest of the multiplexers, that with 2 ways. That is translated in the table of figure A multiplexer can thus switch data made up of several bits.

Electronic forum and Infos.

By putting in series two comparatorsone can compare two numbers of 8 bits. Forms maths Geometry Physics 1. This table, one can extract the equation from the exit S following: According to the state 7415 the entry of selection Athe exit S recopy either the D0 entry, or the D1 entry. A multiplexer can be compared with a mechanical switch.

How to make a site? The integrated circuit is a comparator 4 bitsi. High of page Preceding page Following page. Static page of welcome. Electronic forum and Poem. I here for the following lesson or in the synopsis envisaged to this end. Figure 29 represents the diagram symbolic system and the mechanical equivalent of a multiplexer with 4 ways.

### Binary Comparators CI , Multiplexers CI

Return to the synopsis. A 741557 comparator is a logical circuit which carries out the comparison between 2 generally noted binary numbers A and B. If a multiplexer has n input, it is said that it is about a multiplexer with n ways.

The number of the inputs 7415 a multiplexer defines the number of ways of a multiplexer. When this entry is with state 1it is the data Bi which is transferred in Yi.

Form of the perso pages. Its equation is thus A.

## Quad 2-line to 1-line data selectors / multiplexers 74157

These circuits have several inputs and only one exit. The stitching of this circuit is given on figure 21, while figure 22 represents its logic diagram. In general, the selected entry carries in index the state corresponding to the combination of the entries of order. In this chapter, we will examine logical circuits very much used to switch data: Thus, one can compare numbers of 8, 12, 16 bits….

The number of the entries of order is a function of the number of ways of the multiplexer. The integrated circuit is a quadruple multiplexer with 2 ways at entry of common selection.

The first circuit compares the weak weights of A with the weak weight of B. All these considerations are translated in the truth table of figure For example for a multiplexer with 4 waysone needs 2 entries of order.

Dynamic page of welcome. We will see how to produce using logical doors a comparator of 2 binary digits.

To contact the author. The combinative network of figure 26 can provide the signal S.

That is to say to compare the two binary digits A and Uc. Figure 25 gives the diagram symbolic system and the mechanical equivalent of a multiplexer to 2 ways. We deduce the equation from it from S following: Using one or several entries of order, one switches one of the inputs towards the exit.